Does an equivalence-gated rewrite loop beat a parameter sweep on popcount, leading-zero count and absolute difference?

research/chip-ppa-logic

Equivalence-gated rewrites of 16-bit popcount, 16-bit leading-zero count and 8-bit |a−b| against a no-model sweep: popcount 0.98×, |a−b| 0.86×, but on leading-zero count the sweep (0.56×) beats the session-written rewrites (0.80×) in 168 of 200 equal-budget draws (stylised, gate counts).

5 tests

What it found

A follow-up to chip-ppa-loop on three small blocks where written structure matters. Every candidate is proved equivalent to its reference by a Yosys miter before its generic-gate cells×depth counts. Popcount: no real gain (0.98×). Absolute difference: 0.86×, a structure the sweep also contains. Leading-zero count: the session-written rewrites reach 0.80× but a no-model sweep reaches 0.56× (depth 8 against 11) and beats the proposer in 168 of 200 equal-budget draws. Also fixes a gate bug that rejected correct ROM-style tables. Fifteen attempts by one author, one tool version, gate counts only.

A figure from its own output

Figure produced by research/chip-ppa-logic: clz16 — chip-ppa-logic/experiments/clz16.svg, written by the project's own experiment code.

Paper, code and results

More in LLM chip design loops

Does the rewrite-versus-sweep verdict for a 16-bit leading-zero count survive five ABC scripts?Re-scores chip-ppa-logic's popcount, leading-zero-count and |a−b| candidates under five ABC scripts with every mapped netlist proved equivalent: the clz16 sweep-versus-rewrite verdict flips with the script (best 0.35× the reference); stylised, generic gates.
Does fusing the accumulate into the partial-product tree beat multiply-then-add once the ABC script varies?A fused 4×4 multiply-accumulate: no written rewrite beats a*b+c under the default or three of five ABC scripts, but carry-save forms win by up to 9% cells×depth under dch and resyn2 (stylised, generic-gate).
Do the carry-save multiply-accumulate rewrites still win once mapped to real SKY130 cells, and does the generic-gate score predict that?The chip-ppa-mac carry-save MAC rewrites mapped to SKY130 HD cells: the plain a*b+c under its best script is the overall best, the generic-gate score ranks candidates only weakly like cell areaxdelay (Spearman 0.20; stylised, ABC delay estimate).
How rugged is the landscape of SKY130 area×delay over ABC pass sequences for a multiply-accumulate, and do simple searches beat random at 10–40 evaluations?An exhaustive 800-point table of SKY130 areaxdelay over ABC pass sequences for the MAC (optimum 11% below the best earlier script; needle-like landscape), with random search, hill climbing and session-written proposals compared at equal budget (stylised, preliminary).
How do MAC-lane count and bit width trade area against latency in a tiny quantised-MLP accelerator?Parameterised MAC-lane accelerator for an 8-8-4 quantised MLP, bit- and cycle-exact against NumPy in Icarus; lanes x bit-width sweep puts the cells-times-cycles minimum at 4 lanes (stylised, generic-gate counts).
How far do synthesis-only area and delay sit from placed-and-routed numbers on SKY130?Synthesis-only area and delay versus placed-and-routed OpenROAD numbers on SKY130 for 13 small designs (stylised, global-route estimates).

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Produced with AI assistance (Claude). Results are from the code in this repository and are simulated or stylised unless the abstract says otherwise; nothing here implies affiliation with or endorsement by any lab, researcher or company cited. MIT licensed.