Does the keyword-spotting engine fit a small open-toolchain FPGA, and how fast does it clock?

What it found

The accel-kws serial-MAC engine, wrapped with on-chip weight ROMs and run through Yosys and nextpnr-ice40 for 15 geometries (hidden width 8–128, 2/4/8-bit weights) on the iCE40 UP5K and HX8K, 3 seeds each. All 15 fit: at most 1,138 of the UP5K’s 5,280 logic cells (22%) and 24 of its 30 block RAMs, because Yosys put the weights in block RAM, so logic grows with weight bits rather than width. Post-route Fmax is 15–22 MHz on UP5K and 37–54 MHz on HX8K, so one inference takes 0.04–0.70 ms. Stylised: the weights are random (Speech Commands was unreachable), accuracies are borrowed from accel-kws, and nothing was run on a board or measured for power.

A figure from its own output

Paper, code and results

• README and method
• Experiments and results
• Code
• Tests

More in Task-specific AI accelerators

• When does a task's accuracy tolerance let an accelerator drop its multipliers?Pruning, int4/int8, ternary and binary MLPs on scikit-learn digits (substitute task) with a modelled-energy engine: when does the accuracy slack let the hardware drop multipliers? Stylised; at 1–2 points tolerance, pruned int8 still beats multiplier-free.
• Does the pruning and ternary-weight result from digits hold on real keyword-spotting features?accel-sparse's pruning, int4/int8, ternary and binary sweep re-run on real Speech Commands MFCC features: no multiplier-free design is within 5 points of float32 (ternary 19 down), where digits said 1; int8 pruned 50% is the cheapest within 2 points. Stylised, untuned negative.
• Does weight-sharing lookup-table inference beat a multiply-accumulate engine for a small accelerator?Weight-sharing product-table inference against int8 MAC engines on the digits MLP: negative at this size, break-even only for wide layers with cheap table reads. Stylised, modelled energy.
• Does a wider hidden layer make weight-sharing product-table inference beat an int8 MAC engine?Product-table inference on trained wide digits MLPs (32, 128, 512 hidden): at best 14% under int8 energy, only with an assumed cheap table read. Stylised, modelled energy.
• Does fine-tuning the shared weight values rescue low-K lookup-table inference?Fine-tuning the shared values of accel-lut's product-table engine: rescues K=2 in the 75%-pruned digits MLP (14% under int8 energy only at an assumed cheap table read), not the dense network. Stylised, modelled energy.
• What does a product-table inference engine cost in RTL, against a serial MAC engine?The product-table engine and a serial MAC engine in Verilog, bit-exact against NumPy and synthesised with Yosys: negative, the table needs an accumulator per output (stylised)

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Produced with AI assistance (Claude). Results are from the code in this repository and are simulated or stylised unless the abstract says otherwise; nothing here implies affiliation with or endorsement by any lab, researcher or company cited. MIT licensed.