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LLM chip design loops

Is P = 32 being smaller than P = 16 at equal cycles a real effect or a synthesis artefact?

research/chip-macp32cells

Re-synthesises the 16- and 32-lane MAC engines (same cycles) with three seeds and three Yosys flows: the sign of the cell-count gap depends on the flow, with swings of 1-10%, so chip-systolic-p32's 0.7% ranking is not reliable (artefact-sensitive, stylised, generic-gate counts).

4 tests

What it found

chip-systolic-p32 found the 32-lane MAC engine smaller than the 16-lane one although both take the same cycles. Re-synthesised with three model seeds and three Yosys/abc flows at F = 16 and 32, the sign depends on the flow: P = 32 is smaller in all 6 cases under two flows and larger in all 6 under a four-gate library, by 47 to 699 cells (1–10%). That swing is far above the 0.7% margin used to rank the best design earlier, so that ranking should be discarded. Three seeds, one tool version, generic-gate counts only; the mechanism is not traced.

Paper, code and results

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Produced with AI assistance (Claude). Results are from the code in this repository and are simulated or stylised unless the abstract says otherwise; nothing here implies affiliation with or endorsement by any lab, researcher or company cited. MIT licensed.