How much clearance does a printed two-pin cover need to assemble, and how wasteful is worst-case stacking?
research/robofab-tolstack
How much clearance does a printed two-pin cover need to assemble, and how wasteful is worst-case stacking? At position sd 0.10 mm and size sd 0.05 mm, 99% yield needs 0.62 mm diametral clearance and a ±3σ worst-case stack asks for 2.0 mm (stylised, assumed process spreads).
What it found
Monte Carlo of a printed base with two pins and a cover with two holes, each centre with a Gaussian position error and each diameter a Gaussian size error, translation-only assembly (exact two-disk test). With exact sizes, yield is 1 − exp(−c2/(8σp2)) (tested against simulation). For position sd 0.10 mm and size sd 0.05 mm, 99% yield needs 0.62 mm nominal diametral clearance and 99.9% needs 0.77 mm, while a ±3σ worst-case stack asks for 2.0 mm (3.0–3.4× the 99% requirement and 2.5–2.8× the 99.9% one across the six unbiased cases); a 3σ root-sum-square rule lands at 0.9990–0.9998 yield where the holes are unbiased. A hole bias adds to the needed clearance one for one. Assumed process spreads, not measured; two pins, no rotation, stylised.
A figure from its own output
Paper, code and results
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Produced with AI assistance (Claude). Results are from the code in this repository and are simulated or stylised unless the abstract says otherwise; nothing here implies affiliation with or endorsement by any lab, researcher or company cited. MIT licensed.