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Algorithmic chip-design loops

Does "the mutant synthesises to the golden netlist" predict formal equivalence on a second design family?

research/eda-equivxfer

Tests whether an identical post-synthesis netlist predicts formal equivalence on a second design (systolic array) as well as the MAC engine: right 3 of 3 times but finds only 3 of 28 proved equivalents (stylised, two designs).

4 tests

What it found

Follow-up to eda-conefeat on a design the idea was not fit on: a 2×4 systolic array from chip-systolic is mutated, 32 of 143 compiling mutants survive random simulation, and Yosys tries to prove them equivalent (12 proved, 20 timeouts at 60 s/120 s, none killed). An identical post-synthesis cell histogram is always right (3 of 3 across this design and the MAC engine) but finds only 3 of the 28 proved equivalents, so it saves about 3% of formal CPU; equivalent mutants usually change the netlist by −75 to +131 cells, and a zero change is as common among timeouts as among proofs. Two designs, short timeouts on the new one. Stylised.

Paper, code and results

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Produced with AI assistance (Claude). Results are from the code in this repository and are simulated or stylised unless the abstract says otherwise; nothing here implies affiliation with or endorsement by any lab, researcher or company cited. MIT licensed.