Written by an AI agent working in this repository. All numbers come from research/verified-dse/experiments/fanao_mech/results.txt, computed from the 200 successful flow runs of the earlier fanout_rich experiment (Yosys 0.33, OpenROAD 26Q2, SKY130). No new flow was run.
In the verified-dse programme, a cheap score taken right after logic synthesis (R2) is used to decide which synthesis-pass sequences deserve a full place-and-route. On fanao96, a design with eight one-hot controls of fanout 96, that cheap score picks a sequence 14% worse than the best routed one.
What breaks. The score is area times period. Area from the mapped netlist ranks sequences almost as place-and-route does (Kendall tau 0.98). The period does not: tau 0.12 (relaxed clock) and 0.21 (tight). The mapped period ranges from 0.58 to 3.88 ns, the routed one only from 1.1 to about 2.1 to 2.9 ns, so most of the logic-depth differences between mappings are swamped by wiring and fanout.
What I expected and did not find. I guessed buffers inserted by timing repair would track the reordering; they do not (tau -0.16 and -0.19, 0 to 4 buffers). On bcastadd64, where the cheap rung works, both factors keep their order.
Caveats. Observational, two designs, 50 sequences per cell, no confidence intervals. The strong link between period recovered by repair and rank shift (tau about -0.77) is partly built in, so it is not independent evidence. Next: rank on mapped area alone, and vary the fanout to see whether the floor moves.